Digital System Test and Testable Design: Using Hdl Models and Architectures by Navabi, Zainalabedin

Digital System Test and Testable Design: Using Hdl Models and Architectures (Paperback) (ISBN-13: 9781489979278)

Vendor: Zainalabedin Navabi
Product type: Books
Format: Paperback
$89.99
$89.99
$89.99
Subtotal: $89.99
Digital System Test and Testable Design: Using Hdl Models and Architectures by Navabi, Zainalabedin

Digital System Test and Testable Design: Using Hdl Models and Architectures

$89.99
Digital System Test and Testable Design: Using Hdl Models and Architectures by Navabi, Zainalabedin

Digital System Test and Testable Design: Using Hdl Models and Architectures

$89.99
Format: Paperback
Description
Description
x
Describes test methods in Verilog and PLI, which makes the methods more understandable and the gates possible to simulate Simulation of gate models allows fault simulation and test generation, while Verilog testbenches inject faults, evaluate fault coverage and apply new test patterns Describes DFT, compression, decompression, and BIST techniques in Verilog, which makes the hardware of the architectures easier to understand and allows simulation and evaluation of the testability methods

Author: Zainalabedin Navabi
ISBN-10: 1489979271
ISBN-13: 9781489979278
Publisher: Springer
Language: English
Published: 08/23/2016
Pages: 435
Format: Paperback
Weight: 1.74lbs
Size: 10.00h x 7.00w x 0.93d
By Zainalabedin Navabi
By Zainalabedin Navabi
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About the Author Dr. Zainalabedin Navabi is a professor of electrical and computer engineering at Worcester Polytechnic Institute. Dr. Navabi is the author of several textbooks and computer based trainings on VHDL, Verilog and related tools and environments. Dr. Navabi's involvement with hardware description languages begins in 1976, when he started the development of a register-transfer level simulator for one of the very first HDLs. In 1981 he completed the development of a synthesis tool that generated MOS layout from an RTL description. Since 1981, Dr. Navabi has been involved in the design, definition and implementation of Hardware Description Languages. He has written numerous papers on the application of HDLs in simulation, synthesis and test of digital systems. He started one of the first full HDL courses at Northeastern University in 1990. Since then he has conducted many short courses and tutorials on this subject in the United States and abroad. In addition to being a professor, he is also a consultant to CAE companies. Dr. Navabi received his M.S. and Ph.D. from the University of Arizona in 1978 and 1891, and his B.S. from the University of Texas at Austin in 1975. He is a senior member of IEEE, a member of IEEE Computer Society, member of ASEE, and ACM.

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